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Fix linker-plugin-lto only doing thin lto #136840

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@Flakebi Flakebi commented Feb 10, 2025

When rust provides LLVM bitcode files to lld and the bitcode contains
function summaries as used for thin lto, lld defaults to using thin lto.
This prevents some optimizations that are only applied for fat lto.

We solve this by not creating function summaries when fat lto is
enabled. The bitcode for the module is just directly written out.

An alternative solution would be to set the ThinLTO=0 module flag to
signal lld to do fat lto.
The code in clang that sets this flag is here:
https://github.com./llvm/llvm-project/blob/560149b5e3c891c64899e9912e29467a69dc3a4c/clang/lib/CodeGen/BackendUtil.cpp#L1150
The code in LLVM that queries the flag and defaults to thin lto if not
set is here:
https://github.com./llvm/llvm-project/blob/e258bca9505f35e0a22cb213a305eea9b76d11ea/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp#L4441-L4446

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This PR modifies tests/run-make/. If this PR is trying to port a Makefile
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I have barely any idea about LTO besides "it happens and it involves dlopening a compiler and shoving its serialized data back in it" tbh soo

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Unfortunately I have no clue either, so

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@rustbot rustbot assigned fee1-dead and unassigned jieyouxu Feb 11, 2025
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Flakebi commented Feb 11, 2025

For reference, the code that switches to thin lto when the flag is not set is here: https://github.com./llvm/llvm-project/blob/e258bca9505f35e0a22cb213a305eea9b76d11ea/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp#L4441-L4446

  // By default we compile with ThinLTO if the module has a summary, but the
  // client can request full LTO with a module flag.
  bool IsThinLTO = true;
  if (auto *MD =
          mdconst::extract_or_null<ConstantInt>(M.getModuleFlag("ThinLTO")))
    IsThinLTO = MD->getZExtValue();

The code in clang that sets the flag, which is replicated here for Rust is here: https://github.com./llvm/llvm-project/blob/560149b5e3c891c64899e9912e29467a69dc3a4c/clang/lib/CodeGen/BackendUtil.cpp#L1150

        if (!TheModule->getModuleFlag("ThinLTO") && !CodeGenOpts.UnifiedLTO)
          TheModule->addModuleFlag(llvm::Module::Error, "ThinLTO", uint32_t(0));

// Disable ThinLTO if fat lto is requested. Otherwise lld defaults to thin lto.
if sess.lto() == config::Lto::Fat {
llvm::add_module_flag_u32(llmod, llvm::ModuleFlagMergeBehavior::Override, "ThinLTO", 0);
}
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What if a dependency is built with lto=true (aka lto=fat), but then the user wants to use thinLTO? I'm pretty sure the standard library is built with lto=true for example, but that shouldn't prevent thinLTO from ever working.

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Good question, it seems to change somewhat, but still work in general. I added a test for this.
What changes: Without this change, the test passes when
lib is compiled with O0 and main with O3 and

  1. lib uses lto=thin and main uses lto=thin
  2. lib uses lto=thin and main uses lto=fat
  3. lib uses lto=fat and main uses lto=thin
  4. lib uses lto=fat and main uses lto=fat

With this change, all of these keep passing except for case 3 (lib uses lto=fat and main uses lto=thin).
When lib is compiled with O1, O2 or O3, case 3 passes as well.
I assume this is the important case, as the standard library is compiled with optimizations.
(And lto with O0 is kinda questionable, except maybe for nvptx and amdgpu, but they require lto=fat anyway.)

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@rustbot rustbot assigned SparrowLii and unassigned fee1-dead Feb 16, 2025
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I know little about lto, either. I think it would be much more acceptable if this PR could limit the change to amdhsa conditions.

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@@ -290,6 +290,11 @@ pub(crate) unsafe fn create_module<'ll>(
);
}

// Disable ThinLTO if fat lto is requested. Otherwise lld defaults to thin lto.
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That sounds counterintuitive. Can you explain the relationship between the user's lto option and llvm's lto in the comments?

And I think it needs a individual test to ensure that the previous lto=fat option is not affected

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I changed the comment, is it clearer now?

(I want to affect the current lto=fat option, as it currently does thin lto, which I think is not intended and a bug :))

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I can confirm that the current behavior is surprising, since I ran into this issue with autodiff and it took multiple months to find out that despite selecting lto=fat there is still a thin-lto module in the compilation pipeline.

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Kobzol commented Feb 17, 2025

@dianqk Does this interact with your recent patch?

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dianqk commented Feb 17, 2025

@dianqk Does this interact with your recent patch?

IMO, they aren't directly related.

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@rustbot rustbot assigned saethlin and unassigned Nadrieril and BoxyUwU Feb 17, 2025
@Flakebi Flakebi force-pushed the linker-plugin-lto-fat branch from 7d6bba3 to 7cf1a30 Compare March 27, 2025 10:27
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Flakebi commented Mar 27, 2025

t's fine with me. Why not use ThinBuffer::new(llmod, cgcx.lto != Lto::Fat, config.emit_thin_lto_summary)?

Makes sense, I didn’t look into what LLVMRustThinLTOBufferCreate does when is_thin=false (it just serializes the module to bitcode) :)
(diff to previous version, I rebased afterwards to fix conflicts with 1a99ca8, the checked that the added tests are still failing without the != Lto::Fat change).

I can’t add emit_thin_lto to the condition to use ThinBuffer as emit_thin_lto is always set to true as far as I can see, which seems a bit weird.

Maybe this can be removed later.

Yeah, I think it’s unused now.

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Please also update your PR description.

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dianqk commented Mar 27, 2025

Thanks!
@bors r+

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bors commented Mar 27, 2025

📌 Commit 7cf1a30 has been approved by dianqk

It is now in the queue for this repository.

@bors bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. labels Mar 27, 2025
bors added a commit to rust-lang-ci/rust that referenced this pull request Mar 27, 2025
Fix linker-plugin-lto only doing thin lto

When rust provides LLVM bitcode files to lld and the bitcode contains
function summaries as used for thin lto, lld defaults to using thin lto.
This prevents some optimizations that are only applied for fat lto.

We solve this by not creating function summaries when fat lto is
enabled. The bitcode for the module is just directly written out.

An alternative solution would be to set the `ThinLTO=0` module flag to
signal lld to do fat lto.
The code in clang that sets this flag is here:
https://github.com./llvm/llvm-project/blob/560149b5e3c891c64899e9912e29467a69dc3a4c/clang/lib/CodeGen/BackendUtil.cpp#L1150
The code in LLVM that queries the flag and defaults to thin lto if not
set is here:
https://github.com./llvm/llvm-project/blob/e258bca9505f35e0a22cb213a305eea9b76d11ea/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp#L4441-L4446
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bors commented Mar 27, 2025

⌛ Testing commit 7cf1a30 with merge 1abb8d2...

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bors commented Mar 27, 2025

💔 Test failed - checks-actions

@bors bors added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. and removed S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. labels Mar 27, 2025
@Flakebi Flakebi force-pushed the linker-plugin-lto-fat branch from 7cf1a30 to 16274ea Compare March 27, 2025 18:41
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Flakebi commented Mar 27, 2025

Fix the test for #84395 by removing the -Zemit-thin-lto=no flag and instead setting -Clto=fat (diff to previous version).
As mentioned in that issue, clang also requires setting -flto when using -lto-embed-bitcode=optimized and otherwise runs into the same issue, so I guess that’s another improvement.

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Fix the test for #84395 by removing the -Zemit-thin-lto=no flag and instead setting -Clto=fat (diff to previous version). As mentioned in that issue, clang also requires setting -flto when using -lto-embed-bitcode=optimized and otherwise runs into the same issue, so I guess that’s another improvement.

Hmm, I think -Zemit-thin-lto=no and -Clto=fat have different meanings, one is not submitting the Thin LTO buffer, while the other is performing Rust's Fat LTO, but -Clto=fat should imply -Zemit-thin-lto=no.

Btw, -Zemit-thin-lto=no should also fix your issue?

When rust provides LLVM bitcode files to lld and the bitcode contains
function summaries as used for thin lto, lld defaults to using thin lto.
This prevents some optimizations that are only applied for fat lto.

We solve this by not creating function summaries when fat lto is
enabled. The bitcode for the module is just directly written out.

An alternative solution would be to set the `ThinLTO=0` module flag to
signal lld to do fat lto.
The code in clang that sets this flag is here:
https://github.com./llvm/llvm-project/blob/560149b5e3c891c64899e9912e29467a69dc3a4c/clang/lib/CodeGen/BackendUtil.cpp#L1150
The code in LLVM that queries the flag and defaults to thin lto if not
set is here:
https://github.com./llvm/llvm-project/blob/e258bca9505f35e0a22cb213a305eea9b76d11ea/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp#L4441-L4446
@Flakebi Flakebi force-pushed the linker-plugin-lto-fat branch from 16274ea to 660d1e2 Compare March 28, 2025 09:22
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Flakebi commented Mar 28, 2025

Keep check for emit_thin_lto and revert change in tests/run-make/issue-84395-lto-embed-bitcode/rmake.rs (diff).
Thanks for the quick reviews!

Fix the test for #84395 by removing the -Zemit-thin-lto=no flag and instead setting -Clto=fat (diff to previous version). As mentioned in that issue, clang also requires setting -flto when using -lto-embed-bitcode=optimized and otherwise runs into the same issue, so I guess that’s another improvement.

Hmm, I think -Zemit-thin-lto=no and -Clto=fat have different meanings, one is not submitting the Thin LTO buffer, while the other is performing Rust's Fat LTO, but -Clto=fat should imply -Zemit-thin-lto=no.

Should they be different? As far as I understand #84395, -Zemit-thin-lto was introduced as a workaround to make it somehow work, not as a proper fix. According to llvm/llvm-project#86946, clang behaves the same as Rust (with the fix in this PR): fat lto works with -lto-embed-bitcode=optimized and thin lto doesn’t. I think the problem that thin lto doesn’t work needs a fix in lld. Neither rustc nor clang are in a good position to fix this, unless we want to inspect linker flags and behave differently based on that.

Btw, -Zemit-thin-lto=no should also fix your issue?

It does, but I think that’s a workaround that should not be needed :)

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dianqk commented Mar 28, 2025

Fix the test for #84395 by removing the -Zemit-thin-lto=no flag and instead setting -Clto=fat (diff to previous version). As mentioned in that issue, clang also requires setting -flto when using -lto-embed-bitcode=optimized and otherwise runs into the same issue, so I guess that’s another improvement.

Hmm, I think -Zemit-thin-lto=no and -Clto=fat have different meanings, one is not submitting the Thin LTO buffer, while the other is performing Rust's Fat LTO, but -Clto=fat should imply -Zemit-thin-lto=no.

Should they be different? As far as I understand #84395, -Zemit-thin-lto was introduced as a workaround to make it somehow work, not as a proper fix. According to llvm/llvm-project#86946, clang behaves the same as Rust (with the fix in this PR): fat lto works with -lto-embed-bitcode=optimized and thin lto doesn’t. I think the problem that thin lto doesn’t work needs a fix in lld. Neither rustc nor clang are in a good position to fix this, unless we want to inspect linker flags and behave differently based on that.

This will be useful when we don't want to perform Rust's own LTO.

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dianqk commented Mar 28, 2025

@bors r+

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bors commented Mar 28, 2025

📌 Commit 660d1e2 has been approved by dianqk

It is now in the queue for this repository.

@bors bors added S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Mar 28, 2025
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bors commented Mar 28, 2025

⌛ Testing commit 660d1e2 with merge a5112c8...

bors added a commit to rust-lang-ci/rust that referenced this pull request Mar 28, 2025
Fix linker-plugin-lto only doing thin lto

When rust provides LLVM bitcode files to lld and the bitcode contains
function summaries as used for thin lto, lld defaults to using thin lto.
This prevents some optimizations that are only applied for fat lto.

We solve this by not creating function summaries when fat lto is
enabled. The bitcode for the module is just directly written out.

An alternative solution would be to set the `ThinLTO=0` module flag to
signal lld to do fat lto.
The code in clang that sets this flag is here:
https://github.com./llvm/llvm-project/blob/560149b5e3c891c64899e9912e29467a69dc3a4c/clang/lib/CodeGen/BackendUtil.cpp#L1150
The code in LLVM that queries the flag and defaults to thin lto if not
set is here:
https://github.com./llvm/llvm-project/blob/e258bca9505f35e0a22cb213a305eea9b76d11ea/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp#L4441-L4446
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The job aarch64-gnu-debug failed! Check out the build log: (web) (plain)

Click to see the possible cause of the failure (guessed by this bot)
---- [run-make] tests/run-make/cross-lang-lto-clang stdout ----

error: rmake recipe failed to complete
status: exit status: 101
command: cd "/checkout/obj/build/aarch64-unknown-linux-gnu/test/run-make/cross-lang-lto-clang/rmake_out" && env -u RUSTFLAGS AR="ar" BUILD_ROOT="/checkout/obj/build/aarch64-unknown-linux-gnu" CARGO="/checkout/obj/build/aarch64-unknown-linux-gnu/stage1-tools-bin/cargo" CC="clang" CC_DEFAULT_FLAGS="-ffunction-sections -fdata-sections -fPIC --target=aarch64-unknown-linux-gnu" CLANG="/checkout/obj/build/aarch64-unknown-linux-gnu/llvm/bin/clang" CXX="clang++" CXX_DEFAULT_FLAGS="-ffunction-sections -fdata-sections -fPIC --target=aarch64-unknown-linux-gnu" HOST_RUSTC_DYLIB_PATH="/checkout/obj/build/aarch64-unknown-linux-gnu/stage2/lib" LD_LIBRARY_PATH="/checkout/obj/build/aarch64-unknown-linux-gnu/stage0-bootstrap-tools/aarch64-unknown-linux-gnu/release/deps:/checkout/obj/build/aarch64-unknown-linux-gnu/stage0/lib:/checkout/obj/build/aarch64-unknown-linux-gnu/stage0/lib/rustlib/aarch64-unknown-linux-gnu/lib" LD_LIB_PATH_ENVVAR="LD_LIBRARY_PATH" LLVM_BIN_DIR="/checkout/obj/build/aarch64-unknown-linux-gnu/llvm/bin" LLVM_COMPONENTS="aarch64 aarch64asmparser aarch64codegen aarch64desc aarch64disassembler aarch64info aarch64utils aggressiveinstcombine all all-targets amdgpu amdgpuasmparser amdgpucodegen amdgpudesc amdgpudisassembler amdgpuinfo amdgputargetmca amdgpuutils analysis arm armasmparser armcodegen armdesc armdisassembler arminfo armutils asmparser asmprinter avr avrasmparser avrcodegen avrdesc avrdisassembler avrinfo binaryformat bitreader bitstreamreader bitwriter bpf bpfasmparser bpfcodegen bpfdesc bpfdisassembler bpfinfo cfguard cgdata codegen codegentypes core coroutines coverage csky cskyasmparser cskycodegen cskydesc cskydisassembler cskyinfo debuginfobtf debuginfocodeview debuginfodwarf debuginfogsym debuginfologicalview debuginfomsf debuginfopdb demangle dlltooldriver dwarflinker dwarflinkerclassic dwarflinkerparallel dwp engine executionengine extensions filecheck frontendatomic frontenddriver frontendhlsl frontendoffloading frontendopenacc frontendopenmp fuzzercli fuzzmutate globalisel hexagon hexagonasmparser hexagoncodegen hexagondesc hexagondisassembler hexagoninfo hipstdpar instcombine instrumentation interfacestub interpreter ipo irprinter irreader jitlink libdriver lineeditor linker loongarch loongarchasmparser loongarchcodegen loongarchdesc loongarchdisassembler loongarchinfo lto m68k m68kasmparser m68kcodegen m68kdesc m68kdisassembler m68kinfo mc mca mcdisassembler mcjit mcparser mips mipsasmparser mipscodegen mipsdesc mipsdisassembler mipsinfo mirparser msp430 msp430asmparser msp430codegen msp430desc msp430disassembler msp430info native nativecodegen nvptx nvptxcodegen nvptxdesc nvptxinfo objcarcopts objcopy object objectyaml option orcdebugging orcjit orcshared orctargetprocess passes powerpc powerpcasmparser powerpccodegen powerpcdesc powerpcdisassembler powerpcinfo profiledata remarks riscv riscvasmparser riscvcodegen riscvdesc riscvdisassembler riscvinfo riscvtargetmca runtimedyld sandboxir scalaropts selectiondag sparc sparcasmparser sparccodegen sparcdesc sparcdisassembler sparcinfo support symbolize systemz systemzasmparser systemzcodegen systemzdesc systemzdisassembler systemzinfo tablegen target targetparser telemetry textapi textapibinaryreader transformutils vectorize webassembly webassemblyasmparser webassemblycodegen webassemblydesc webassemblydisassembler webassemblyinfo webassemblyutils windowsdriver windowsmanifest x86 x86asmparser x86codegen x86desc x86disassembler x86info x86targetmca xray xtensa xtensaasmparser xtensacodegen xtensadesc xtensadisassembler xtensainfo" LLVM_FILECHECK="/checkout/obj/build/aarch64-unknown-linux-gnu/llvm/build/bin/FileCheck" PYTHON="/usr/bin/python3" RUSTC="/checkout/obj/build/aarch64-unknown-linux-gnu/stage2/bin/rustc" RUSTC_LINKER="clang" RUSTDOC="/checkout/obj/build/aarch64-unknown-linux-gnu/stage2/bin/rustdoc" SOURCE_ROOT="/checkout" TARGET="aarch64-unknown-linux-gnu" TARGET_EXE_DYLIB_PATH="/checkout/obj/build/aarch64-unknown-linux-gnu/stage2/lib/rustlib/aarch64-unknown-linux-gnu/lib" "/checkout/obj/build/aarch64-unknown-linux-gnu/test/run-make/cross-lang-lto-clang/rmake"
stdout: none
--- stderr -------------------------------
<<<<<< TRUNCATED, SHOWING THE FIRST 524288 BYTES >>>>>>

assert_contains_regex:
=== HAYSTACK ===

cmain: file format elf64-littleaarch64

Disassembly of section .text:

0000000000024040 <_start>:
   24040: d503201f      nop
   24044: d280001d      mov x29, #0x0               // =0
   24048: d280001e      mov x30, #0x0               // =0
   2404c: aa0003e5      mov x5, x0
   24050: f94003e1      ldr x1, [sp]
   24054: 910023e2      add x2, sp, #0x8
   24058: 910003e6      mov x6, sp
   2405c: d503201f      nop
   24060: 102116a0      adr x0, 0x66334 <main>
   24064: d2800003      mov x3, #0x0                // =0
   24068: d2800004      mov x4, #0x0                // =0
   2406c: 940108dd      bl 0x663e0 <__libc_start_main@plt>
   24070: 940108d8      bl 0x663d0 <abort@plt>

0000000000024074 <call_weak_fn>:
   24074: d00002a0      adrp x0, 0x7a000 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x18a8>
   24078: f942a800      ldr x0, [x0, #0x550]
   2407c: b4000040      cbz x0, 0x24084 <call_weak_fn+0x10>
   24080: 140108dc      b 0x663f0 <__gmon_start__@plt>
   24084: d65f03c0      ret
  ...

0000000000024090 <deregister_tm_clones>:
   24090: d503201f      nop
   24094: 103373a0      adr x0, 0x8af08 <__TMC_LIST__>
   24098: d503201f      nop
   2409c: 10337361      adr x1, 0x8af08 <__TMC_LIST__>
   240a0: eb00003f      cmp x1, x0
   240a4: 540000c0      b.eq 0x240bc <deregister_tm_clones+0x2c>
   240a8: d00002a1      adrp x1, 0x7a000 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x18a8>
   240ac: f942ac21      ldr x1, [x1, #0x558]
   240b0: b4000061      cbz x1, 0x240bc <deregister_tm_clones+0x2c>
   240b4: aa0103f0      mov x16, x1
   240b8: d61f0200      br x16
   240bc: d65f03c0      ret

00000000000240c0 <register_tm_clones>:
   240c0: d503201f      nop
   240c4: 10337220      adr x0, 0x8af08 <__TMC_LIST__>
   240c8: d503201f      nop
   240cc: 103371e1      adr x1, 0x8af08 <__TMC_LIST__>
   240d0: cb000021      sub x1, x1, x0
   240d4: d37ffc22      lsr x2, x1, #63
   240d8: 8b810c41      add x1, x2, x1, asr #3
   240dc: 9341fc21      asr x1, x1, #1
   240e0: b40000c1      cbz x1, 0x240f8 <register_tm_clones+0x38>
   240e4: d00002a2      adrp x2, 0x7a000 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x18a8>
   240e8: f942b042      ldr x2, [x2, #0x560]
   240ec: b4000062      cbz x2, 0x240f8 <register_tm_clones+0x38>
   240f0: aa0203f0      mov x16, x2
   240f4: d61f0200      br x16
   240f8: d65f03c0      ret
   240fc: d503201f      nop

0000000000024100 <__do_global_dtors_aux>:
   24100: a9be7bfd      stp x29, x30, [sp, #-0x20]!
   24104: 910003fd      mov x29, sp
   24108: f9000bf3      str x19, [sp, #0x10]
   2410c: f0000333      adrp x19, 0x8b000 <__TMC_LIST__+0xf8>
   24110: 39420260      ldrb w0, [x19, #0x80]
   24114: 35000140      cbnz w0, 0x2413c <__do_global_dtors_aux+0x3c>
   24118: d00002a0      adrp x0, 0x7a000 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x18a8>
   2411c: f942b400      ldr x0, [x0, #0x568]
   24120: b4000080      cbz x0, 0x24130 <__do_global_dtors_aux+0x30>
   24124: d0000320      adrp x0, 0x8a000 <write+0x8a000>
   24128: f942c400      ldr x0, [x0, #0x588]
   2412c: 940108b5      bl 0x66400 <__cxa_finalize@plt>
   24130: 97ffffd8      bl 0x24090 <deregister_tm_clones>
   24134: 52800020      mov w0, #0x1                // =1
   24138: 39020260      strb w0, [x19, #0x80]
   2413c: f9400bf3      ldr x19, [sp, #0x10]
   24140: a8c27bfd      ldp x29, x30, [sp], #0x20
   24144: d65f03c0      ret
   24148: d503201f      nop
   2414c: d503201f      nop

0000000000024150 <frame_dummy>:
   24150: 17ffffdc      b 0x240c0 <register_tm_clones>
  ...

0000000000024160 <__aarch64_ldadd8_relax>:
   24160: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24164: 39421210      ldrb w16, [x16, #0x84]
   24168: 34000070      cbz w16, 0x24174 <__aarch64_ldadd8_relax+0x14>
   2416c: f8200020      ldadd x0, x0, [x1]
   24170: d65f03c0      ret
   24174: aa0003f0      mov x16, x0
   24178: c85f7c20      ldxr x0, [x1]
   2417c: 8b100011      add x17, x0, x16
   24180: c80f7c31      stxr w15, x17, [x1]
   24184: 35ffffaf      cbnz w15, 0x24178 <__aarch64_ldadd8_relax+0x18>
   24188: d65f03c0      ret

000000000002418c <init_have_lse_atomics>:
   2418c: f81f0ffe      str x30, [sp, #-0x10]!
   24190: 52800200      mov w0, #0x10               // =16
   24194: 94010937      bl 0x66670 <getauxval@plt>
   24198: f0000328      adrp x8, 0x8b000 <__TMC_LIST__+0xf8>
   2419c: 53082009      ubfx w9, w0, #8, #1
   241a0: 39021109      strb w9, [x8, #0x84]
   241a4: f84107fe      ldr x30, [sp], #0x10
   241a8: d65f03c0      ret

00000000000241ac <__init_cpu_features_resolver>:
   241ac: f0000328      adrp x8, 0x8b000 <__TMC_LIST__+0xf8>
   241b0: f9404508      ldr x8, [x8, #0x88]
   241b4: b4000048      cbz x8, 0x241bc <__init_cpu_features_resolver+0x10>
   241b8: d65f03c0      ret
   241bc: 14000001      b 0x241c0 <__init_cpu_features_constructor>

00000000000241c0 <__init_cpu_features_constructor>:
   241c0: b7f00060      tbnz x0, #0x3e, 0x241cc <__init_cpu_features_constructor+0xc>
   241c4: aa1f03e8      mov x8, xzr
   241c8: 14000002      b 0x241d0 <__init_cpu_features_constructor+0x10>
   241cc: f9400828      ldr x8, [x1, #0x10]
   241d0: 531d700a      lsl w10, w0, #3
   241d4: 5315500c      lsl w12, w0, #11
   241d8: 9276014a      and x10, x10, #0x400
   241dc: 9271018c      and x12, x12, #0x8000
   241e0: aa0a018a      orr x10, x12, x10
   241e4: d35afc0c      lsr x12, x0, #26
   241e8: d34efc0b      lsr x11, x0, #14
   241ec: 927f018c      and x12, x12, #0x2
   241f0: d345fd0d      lsr x13, x8, #5
   241f4: aa0c014c      orr x12, x10, x12
   241f8: 927e01aa      and x10, x13, #0x4
   241fc: 927b016b      and x11, x11, #0x20
   24200: d350fc0d      lsr x13, x0, #16
   24204: d349fc09      lsr x9, x0, #9
   24208: 927c01ad      and x13, x13, #0x10
   2420c: d354fc0e      lsr x14, x0, #20
   24210: aa0b018b      orr x11, x12, x11
   24214: 927d01ce      and x14, x14, #0x8
   24218: aa0d016b      orr x11, x11, x13
   2421c: d347fc0c      lsr x12, x0, #7
   24220: aa0e016b      orr x11, x11, x14
   24224: 926f018c      and x12, x12, #0x20000
   24228: d346fc0e      lsr x14, x0, #6
   2422c: b370012b      bfi x11, x9, #16, #1
   24230: 531a6409      lsl w9, w0, #6
   24234: 927a01ce      and x14, x14, #0x40
   24238: aa0c016b      orr x11, x11, x12
   2423c: d379e00d      lsl x13, x0, #7
   24240: 92740129      and x9, x9, #0x1000
   24244: aa0e016b      orr x11, x11, x14
   24248: 926c01ac      and x12, x13, #0x100000
   2424c: aa090169      orr x9, x11, x9
   24250: d36fb80e      lsl x14, x0, #17
   24254: 926b01ad      and x13, x13, #0x200000
   24258: aa0c0129      orr x9, x9, x12
   2425c: 925201ce      and x14, x14, #0x400000000000
   24260: d36ba80b      lsl x11, x0, #21
   24264: aa0d0129      orr x9, x9, x13
   24268: 924f016b      and x11, x11, #0x2000000000000
   2426c: aa0e0129      orr x9, x9, x14
   24270: d341fc0e      lsr x14, x0, #1
   24274: aa0b0129      orr x9, x9, x11
   24278: 927901ce      and x14, x14, #0x80
   2427c: d366950c      lsl x12, x8, #26
   24280: aa0e0129      orr x9, x9, x14
   24284: 9254018c      and x12, x12, #0x100000000000
   24288: d35d710d      lsl x13, x8, #35
   2428c: aa0a0129      orr x9, x9, x10
   24290: 925a01ab      and x11, x13, #0x4000000000
   24294: aa0c0129      orr x9, x9, x12
   24298: 925901ae      and x14, x13, #0x8000000000
   2429c: aa0b0129      orr x9, x9, x11
   242a0: 925801aa      and x10, x13, #0x10000000000
   242a4: aa0e0129      orr x9, x9, x14
   242a8: 925701ac      and x12, x13, #0x20000000000
   242ac: d36db10b      lsl x11, x8, #19
   242b0: aa0a0129      orr x9, x9, x10
   242b4: 926d016e      and x14, x11, #0x80000
   242b8: aa0c0129      orr x9, x9, x12
   242bc: d373c90a      lsl x10, x8, #13
   242c0: d350410c      ubfx x12, x8, #16, #1
   242c4: aa0e0129      orr x9, x9, x14
   242c8: 9266014a      and x10, x10, #0x4000000
   242cc: d370bd0e      lsl x14, x8, #16
   242d0: aa0c0129      orr x9, x9, x12
   242d4: 926801cc      and x12, x14, #0x1000000
   242d8: aa0a0129      orr x9, x9, x10
   242dc: d3689d0a      lsl x10, x8, #24
   242e0: aa0c0129      orr x9, x9, x12
   242e4: 925e014c      and x12, x10, #0x400000000
   242e8: 925d014a      and x10, x10, #0x800000000
   242ec: aa0c0129      orr x9, x9, x12
   242f0: d35f790c      lsl x12, x8, #33
   242f4: aa0a0129      orr x9, x9, x10
   242f8: 924e018c      and x12, x12, #0x4000000000000
   242fc: 9256016b      and x11, x11, #0x40000000000
   24300: aa0c0129      orr x9, x9, x12
   24304: d369a10c      lsl x12, x8, #23
   24308: 924a018c      and x12, x12, #0x40000000000000
   2430c: d34ffc0a      lsr x10, x0, #15
   24310: aa0c0129      orr x9, x9, x12
   24314: d36cad0c      lsl x12, x8, #20
   24318: aa0b0129      orr x9, x9, x11
   2431c: d3607d0b      lsl x11, x8, #32
   24320: 9247018c      and x12, x12, #0x200000000000000
   24324: 9248016b      and x11, x11, #0x100000000000000
   24328: aa0c0129      orr x9, x9, x12
   2432c: d362850c      lsl x12, x8, #30
   24330: 9249018c      and x12, x12, #0x80000000000000
   24334: aa0b0129      orr x9, x9, x11
   24338: 531e740b      lsl w11, w0, #2
   2433c: aa0c0129      orr x9, x9, x12
   24340: 926e016b      and x11, x11, #0x40000
   24344: d343fc0c      lsr x12, x0, #3
   24348: 9269018c      and x12, x12, #0x800000
   2434c: b36a014b      bfi x11, x10, #22, #1
   24350: 53185c0a      lsl w10, w0, #8
   24354: aa0c016b      orr x11, x11, x12
   24358: 9262014a      and x10, x10, #0x40000000
   2435c: d36efd0c      lsr x12, x8, #46
   24360: aa0a016a      orr x10, x11, x10
   24364: d344fc0b      lsr x11, x0, #4
   24368: d34efd08      lsr x8, x8, #14
   2436c: 9273016b      and x11, x11, #0x2000
   24370: aa0b014a      orr x10, x10, x11
   24374: 924501cb      and x11, x14, #0x800000000000000
   24378: aa0b0129      orr x9, x9, x11
   2437c: b346018a      bfi x10, x12, #58, #1
   24380: f240001f      tst x0, #0x1
   24384: b365010a      bfi x10, x8, #27, #1
   24388: b2780528      orr x8, x9, #0x300
   2438c: 925c01ab      and x11, x13, #0x1000000000
   24390: 9a880128      csel x8, x9, x8, eq
   24394: aa0b0149      orr x9, x10, x11
   24398: aa080128      orr x8, x9, x8
   2439c: f0000329      adrp x9, 0x8b000 <__TMC_LIST__+0xf8>
   243a0: b2410108      orr x8, x8, #0x8000000000000000
   243a4: f9004528      str x8, [x9, #0x88]
   243a8: d65f03c0      ret

00000000000243ac <__init_cpu_features>:
   243ac: d100c3ff      sub sp, sp, #0x30
   243b0: a9024ffe      stp x30, x19, [sp, #0x20]
   243b4: f0000328      adrp x8, 0x8b000 <__TMC_LIST__+0xf8>
   243b8: f9404508      ldr x8, [x8, #0x88]
   243bc: b4000088      cbz x8, 0x243cc <__init_cpu_features+0x20>
   243c0: a9424ffe      ldp x30, x19, [sp, #0x20]
   243c4: 9100c3ff      add sp, sp, #0x30
   243c8: d65f03c0      ret
   243cc: 52800200      mov w0, #0x10               // =16
   243d0: 940108a8      bl 0x66670 <getauxval@plt>
   243d4: aa0003f3      mov x19, x0
   243d8: 52800340      mov w0, #0x1a               // =26
   243dc: 940108a5      bl 0x66670 <getauxval@plt>
   243e0: b2420268      orr x8, x19, #0x4000000000000000
   243e4: 52800309      mov w9, #0x18               // =24
   243e8: f9000fe0      str x0, [sp, #0x18]
   243ec: 910023e1      add x1, sp, #0x8
   243f0: aa0803e0      mov x0, x8
   243f4: a900cfe9      stp x9, x19, [sp, #0x8]
   243f8: 97ffff72      bl 0x241c0 <__init_cpu_features_constructor>
   243fc: a9424ffe      ldp x30, x19, [sp, #0x20]
   24400: 9100c3ff      add sp, sp, #0x30
   24404: d65f03c0      ret
  ...

0000000000024410 <__aarch64_cas4_acq>:
   24410: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24414: 39421210      ldrb w16, [x16, #0x84]
   24418: 34000070      cbz w16, 0x24424 <__aarch64_cas4_acq+0x14>
   2441c: 88e07c41      casa w0, w1, [x2]
   24420: d65f03c0      ret
   24424: 2a0003f0      mov w16, w0
   24428: 885ffc40      ldaxr w0, [x2]
   2442c: 6b10001f      cmp w0, w16
   24430: 54000061      b.ne 0x2443c <__aarch64_cas4_acq+0x2c>
   24434: 88117c41      stxr w17, w1, [x2]
   24438: 35ffff91      cbnz w17, 0x24428 <__aarch64_cas4_acq+0x18>
   2443c: d65f03c0      ret

0000000000024440 <__aarch64_swp1_relax>:
   24440: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24444: 39421210      ldrb w16, [x16, #0x84]
   24448: 34000070      cbz w16, 0x24454 <__aarch64_swp1_relax+0x14>
   2444c: 38208020      swpb w0, w0, [x1]
   24450: d65f03c0      ret
   24454: 2a0003f0      mov w16, w0
   24458: 085f7c20      ldxrb w0, [x1]
   2445c: 08117c30      stxrb w17, w16, [x1]
   24460: 35ffffd1      cbnz w17, 0x24458 <__aarch64_swp1_relax+0x18>
   24464: d65f03c0      ret
  ...

0000000000024470 <__aarch64_cas1_relax>:
   24470: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24474: 39421210      ldrb w16, [x16, #0x84]
   24478: 34000070      cbz w16, 0x24484 <__aarch64_cas1_relax+0x14>
   2447c: 08a07c41      casb w0, w1, [x2]
   24480: d65f03c0      ret
   24484: 53001c10      uxtb w16, w0
   24488: 085f7c40      ldxrb w0, [x2]
   2448c: 6b10001f      cmp w0, w16
   24490: 54000061      b.ne 0x2449c <__aarch64_cas1_relax+0x2c>
   24494: 08117c41      stxrb w17, w1, [x2]
   24498: 35ffff91      cbnz w17, 0x24488 <__aarch64_cas1_relax+0x18>
   2449c: d65f03c0      ret

00000000000244a0 <__aarch64_swp4_acq>:
   244a0: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   244a4: 39421210      ldrb w16, [x16, #0x84]
   244a8: 34000070      cbz w16, 0x244b4 <__aarch64_swp4_acq+0x14>
   244ac: b8a08020      swpa w0, w0, [x1]
   244b0: d65f03c0      ret
   244b4: 2a0003f0      mov w16, w0
   244b8: 885ffc20      ldaxr w0, [x1]
   244bc: 88117c30      stxr w17, w16, [x1]
   244c0: 35ffffd1      cbnz w17, 0x244b8 <__aarch64_swp4_acq+0x18>
   244c4: d65f03c0      ret
  ...

00000000000244d0 <__aarch64_cas4_relax>:
   244d0: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   244d4: 39421210      ldrb w16, [x16, #0x84]
   244d8: 34000070      cbz w16, 0x244e4 <__aarch64_cas4_relax+0x14>
   244dc: 88a07c41      cas w0, w1, [x2]
   244e0: d65f03c0      ret
   244e4: 2a0003f0      mov w16, w0
   244e8: 885f7c40      ldxr w0, [x2]
   244ec: 6b10001f      cmp w0, w16
   244f0: 54000061      b.ne 0x244fc <__aarch64_cas4_relax+0x2c>
   244f4: 88117c41      stxr w17, w1, [x2]
   244f8: 35ffff91      cbnz w17, 0x244e8 <__aarch64_cas4_relax+0x18>
   244fc: d65f03c0      ret

0000000000024500 <__aarch64_ldadd4_rel>:
   24500: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24504: 39421210      ldrb w16, [x16, #0x84]
   24508: 34000070      cbz w16, 0x24514 <__aarch64_ldadd4_rel+0x14>
   2450c: b8600020      ldaddl w0, w0, [x1]
   24510: d65f03c0      ret
   24514: 2a0003f0      mov w16, w0
   24518: 885f7c20      ldxr w0, [x1]
   2451c: 0b100011      add w17, w0, w16
   24520: 880ffc31      stlxr w15, w17, [x1]
   24524: 35ffffaf      cbnz w15, 0x24518 <__aarch64_ldadd4_rel+0x18>
   24528: d65f03c0      ret
   2452c: 00000000      udf #0x0

0000000000024530 <__aarch64_swp4_rel>:
   24530: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24534: 39421210      ldrb w16, [x16, #0x84]
   24538: 34000070      cbz w16, 0x24544 <__aarch64_swp4_rel+0x14>
   2453c: b8608020      swpl w0, w0, [x1]
   24540: d65f03c0      ret
   24544: 2a0003f0      mov w16, w0
   24548: 885f7c20      ldxr w0, [x1]
   2454c: 8811fc30      stlxr w17, w16, [x1]
   24550: 35ffffd1      cbnz w17, 0x24548 <__aarch64_swp4_rel+0x18>
   24554: d65f03c0      ret
  ...

0000000000024560 <__aarch64_ldadd8_rel>:
   24560: f0000330      adrp x16, 0x8b000 <__TMC_LIST__+0xf8>
   24564: 39421210      ldrb w16, [x16, #0x84]
   24568: 34000070      cbz w16, 0x24574 <__aarch64_ldadd8_rel+0x14>
   2456c: f8600020      ldaddl x0, x0, [x1]
   24570: d65f03c0      ret
   24574: aa0003f0      mov x16, x0
   24578: c85f7c20      ldxr x0, [x1]
   2457c: 8b100011      add x17, x0, x16
   24580: c80ffc31      stlxr w15, x17, [x1]
   24584: 35ffffaf      cbnz w15, 0x24578 <__aarch64_ldadd8_rel+0x18>
   24588: d65f03c0      ret

000000000002458c <_ZN3std9panicking41begin_panic$u7b$$u7b$reify.shim$u7d$$u7d$17hb39f0ed767070860E>:
   2458c: a9bf7bfd      stp x29, x30, [sp, #-0x10]!
   24590: 910003fd      mov x29, sp
   24594: 94000001      bl 0x24598 <_ZN3std9panicking11begin_panic17h717bbd0877c169a2E>

0000000000024598 <_ZN3std9panicking11begin_panic17h717bbd0877c169a2E>:
   24598: d100c3ff      sub sp, sp, #0x30
   2459c: a9027bfd      stp x29, x30, [sp, #0x20]
   245a0: 910083fd      add x29, sp, #0x20
   245a4: a90087e0      stp x0, x1, [sp, #0x8]
   245a8: d503201f      nop
   245ac: 102a0fe8      adr x8, 0x787a8 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x50>
   245b0: 910023e0      add x0, sp, #0x8
   245b4: f9000fe8      str x8, [sp, #0x18]
   245b8: 94000001      bl 0x245bc <_ZN3std3sys9backtrace26__rust_end_short_backtrace17hb68b9834e0f6abf5E>

00000000000245bc <_ZN3std3sys9backtrace26__rust_end_short_backtrace17hb68b9834e0f6abf5E>:
   245bc: a9bf7bfd      stp x29, x30, [sp, #-0x10]!
   245c0: 910003fd      mov x29, sp
   245c4: 94000001      bl 0x245c8 <_ZN3std9panicking11begin_panic28_$u7b$$u7b$closure$u7d$$u7d$17hf14dbc9bb94ebf87E>

00000000000245c8 <_ZN3std9panicking11begin_panic28_$u7b$$u7b$closure$u7d$$u7d$17hf14dbc9bb94ebf87E>:
   245c8: d10083ff      sub sp, sp, #0x20
   245cc: a9017bfd      stp x29, x30, [sp, #0x10]
   245d0: 910043fd      add x29, sp, #0x10
   245d4: a9402408      ldp x8, x9, [x0]
   245d8: d503201f      nop
   245dc: 102ac061      adr x1, 0x79de8 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x1690>
   245e0: f9400802      ldr x2, [x0, #0x10]
   245e4: 910003e0      mov x0, sp
   245e8: 52800023      mov w3, #0x1                // =1
   245ec: 2a1f03e4      mov w4, wzr
   245f0: a90027e8      stp x8, x9, [sp]
   245f4: 9400010c      bl 0x24a24 <_ZN3std9panicking20rust_panic_with_hook17h3fde75dcead62740E>

00000000000245f8 <rust_eh_personality>:
   245f8: d102c3ff      sub sp, sp, #0xb0
   245fc: a9057bfd      stp x29, x30, [sp, #0x50]
   24600: a9066ffc      stp x28, x27, [sp, #0x60]
   24604: a90767fa      stp x26, x25, [sp, #0x70]
   24608: a9085ff8      stp x24, x23, [sp, #0x80]
   2460c: a90957f6      stp x22, x21, [sp, #0x90]
   24610: a90a4ff4      stp x20, x19, [sp, #0xa0]
   24614: 910143fd      add x29, sp, #0x50
   24618: 7100041f      cmp w0, #0x1
   2461c: 540009c1      b.ne 0x24754 <rust_eh_personality+0x15c>
   24620: aa0403e0      mov x0, x4
   24624: aa0403f3      mov x19, x4
   24628: 2a0103f5      mov w21, w1
   2462c: a90193e3      stp x3, x4, [sp, #0x18]
   24630: 940107d8      bl 0x66590 <_Unwind_GetLanguageSpecificData@plt>
   24634: aa0003f8      mov x24, x0
   24638: d10093a1      sub x1, x29, #0x24
   2463c: aa1303e0      mov x0, x19
   24640: b81dc3bf      stur wzr, [x29, #-0x24]
   24644: 940107d7      bl 0x665a0 <_Unwind_GetIPInfo@plt>
   24648: b85dc3a8      ldur w8, [x29, #-0x24]
   2464c: aa0003f7      mov x23, x0
   24650: aa1303e0      mov x0, x19
   24654: 7100011f      cmp w8, #0x0
   24658: 1a9f17fa      cset w26, eq
   2465c: 940107d5      bl 0x665b0 <_Unwind_GetRegionStart@plt>
   24660: 910083e8      add x8, sp, #0x20
   24664: a93e23a8      stp x8, x8, [x29, #-0x20]
   24668: b4001698      cbz x24, 0x24938 <rust_eh_personality+0x340>
   2466c: d10023a8      sub x8, x29, #0x8
   24670: cb180109      sub x9, x8, x24
   24674: eb080308      subs x8, x24, x8
   24678: 9a898108      csel x8, x8, x9, hi
   2467c: b4001a08      cbz x8, 0x249bc <rust_eh_personality+0x3c4>
   24680: b100071f      cmn x24, #0x1
   24684: 54001940      b.eq 0x249ac <rust_eh_personality+0x3b4>
   24688: 39400319      ldrb w25, [x24]
   2468c: aa0003f6      mov x22, x0
   24690: 9100071b      add x27, x24, #0x1
   24694: f81f03bb      stur x27, [x29, #-0x10]
   24698: 7103ff3f      cmp w25, #0xff
   2469c: 540001a0      b.eq 0x246d0 <rust_eh_personality+0xd8>
   246a0: 53041b28      ubfx w8, w25, #4, #3
   246a4: 7100091f      cmp w8, #0x2
   246a8: 5400018c      b.gt 0x246d8 <rust_eh_personality+0xe0>
   246ac: 34000508      cbz w8, 0x2474c <rust_eh_personality+0x154>
   246b0: 7100051f      cmp w8, #0x1
   246b4: 54000340      b.eq 0x2471c <rust_eh_personality+0x124>
   246b8: 7100091f      cmp w8, #0x2
   246bc: 540004c1      b.ne 0x24754 <rust_eh_personality+0x15c>
   246c0: d10083a0      sub x0, x29, #0x20
   246c4: d503201f      nop
   246c8: 102ac888      adr x8, 0x79fd8 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x1880>
   246cc: 1400000f      b 0x24708 <rust_eh_personality+0x110>
   246d0: aa1603f4      mov x20, x22
   246d4: 1400003c      b 0x247c4 <rust_eh_personality+0x1cc>
   246d8: 71000d1f      cmp w8, #0x3
   246dc: 54000100      b.eq 0x246fc <rust_eh_personality+0x104>
   246e0: 7100151f      cmp w8, #0x5
   246e4: 540002c0      b.eq 0x2473c <rust_eh_personality+0x144>
   246e8: 7100111f      cmp w8, #0x4
   246ec: 54000341      b.ne 0x24754 <rust_eh_personality+0x15c>
   246f0: aa1603f8      mov x24, x22
   246f4: b5000176      cbnz x22, 0x24720 <rust_eh_personality+0x128>
   246f8: 14000017      b 0x24754 <rust_eh_personality+0x15c>
   246fc: d10063a0      sub x0, x29, #0x18
   24700: d503201f      nop
   24704: 102ac828      adr x8, 0x7a008 <_ZN3std9panicking11EMPTY_PANIC17heab66fed4b0ca396E+0x18b0>
   24708: f9401508      ldr x8, [x8, #0x28]
   2470c: d63f0100      blr x8
   24710: aa0003f8      mov x24, x0
   24714: b5000060      cbnz x0, 0x24720 <rust_eh_personality+0x128>
   24718: 1400000d      b 0x2474c <rust_eh_personality+0x154>
   2471c: aa1b03f8      mov x24, x27
   24720: d10043a0      sub x0, x29, #0x10
   24724: 12000f21      and w1, w25, #0xf
   24728: 94010501      bl 0x65b2c <_ZN3std3sys11personality5dwarf2eh19read_encoded_offset17h50d3bb143837a260E>
   2472c: 37000140      tbnz w0, #0x0, 0x24754 <rust_eh_personality+0x15c>

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bors commented Mar 28, 2025

💔 Test failed - checks-actions

@bors bors added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. and removed S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. labels Mar 28, 2025
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A-run-make Area: port run-make Makefiles to rmake.rs S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
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