v0.12.0-esp32-20250422

Features:

• target/esp32c61: Added psram support.
• loaders/esp32p4: Added flash encryption support.

Fixes:

• target/esp32p4: Disable super watchdog on halt. That could lead to unexpected chip resets.
• target/esp32p4: Disable auto clock gating for all peripherals on reset, as it could lead to failure during memory read/write.
• src/freertos: Fixed target memory cleanup. If the target is running post reset, we still need to cleanup OpenOCD's rtos variables, but we cannot touch the target memory as the application code will clean it, and might have already updated the memory with new data.
• tcl/target: Fixed esp32 and esp32s3 PSRAM memory type and regions. While writing the memory mapped PSRAM regions, there was a failure like read-only memory cannot be written. Because psram addresses were set as DROM.
• tcl/esp32c[5|61]: Fixed WDT TG interrupt state clearing.
• target/esp32c5: Added halt delay to wait for haltreq response. This workarounds problem observed on some esp32c5 ECO2 chips when hart HALTED state in dmstatus is refelected with some delay after haltreq is set in dmcontrol.
• target/esp: Call timer callbacks in esp32_apptrace_wait_tracing_finished. Let registered timer callbacks to run while waiting for tracing to finish