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Enable f16 in assembly on aarch64 platforms that support it
Signed-off-by: rongfu.leng <[email protected]>
1 parent 4bc39f0 commit dd8dc65

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9 files changed

+30
-9
lines changed

9 files changed

+30
-9
lines changed

Diff for: compiler/rustc_target/src/asm/aarch64.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -59,9 +59,9 @@ impl AArch64InlineAsmRegClass {
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match self {
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Self::reg => types! { _: I8, I16, I32, I64, F32, F64; },
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Self::vreg | Self::vreg_low16 => types! {
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neon: I8, I16, I32, I64, F32, F64,
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neon: I8, I16, I32, I64, F16, F32, F64,
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VecI8(8), VecI16(4), VecI32(2), VecI64(1), VecF32(2), VecF64(1),
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VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF32(4), VecF64(2);
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VecI8(16), VecI16(8), VecI32(4), VecI64(2), VecF16(4),VecF16(8),VecF32(4), VecF64(2);
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},
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Self::preg => &[],
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}

Diff for: src/doc/reference

Diff for: src/tools/cargo

Submodule cargo updated 270 files

Diff for: tests/ui/asm/aarch64/type-check-3.stderr

+1-1
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@ error: type `Simd256bit` cannot be used with this register class
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LL | asm!("{}", in(vreg) f64x4);
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| ^^^^^
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|
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= note: register class `vreg` supports these types: i8, i16, i32, i64, f32, f64, i8x8, i16x4, i32x2, i64x1, f32x2, f64x1, i8x16, i16x8, i32x4, i64x2, f32x4, f64x2
114+
= note: register class `vreg` supports these types: i8, i16, i32, i64, f16, f32, f64, i8x8, i16x4, i32x2, i64x1, f32x2, f64x1, i8x16, i16x8, i32x4, i64x2, f16x4, f16x8, f32x4, f64x2
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error: incompatible types for asm inout argument
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--> $DIR/type-check-3.rs:88:33

Diff for: tests/ui/asm/aarch64/type-f16.rs

+21
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
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//@ only-aarch64
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//@ run-pass
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#![feature(f16, f128)]
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use std::arch::asm;
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#[inline(never)]
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pub fn f32_to_f16_asm(a: f32) -> f16 {
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let ret: f16;
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unsafe {
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asm!(
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"fcvt {ret:h}, {a:s}",
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a = in(vreg) a,
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ret = lateout(vreg) ret,
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options(nomem, nostack),
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);
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}
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ret
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}
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fn main() {
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assert_eq!(f32_to_f16_asm(1.0 as f32), 1.0);
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}

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