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[InstCombine] Empty lifetime range removal changes behaviour #131927

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tmiasko opened this issue Mar 18, 2025 · 0 comments
Open

[InstCombine] Empty lifetime range removal changes behaviour #131927

tmiasko opened this issue Mar 18, 2025 · 0 comments

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@tmiasko
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tmiasko commented Mar 18, 2025

In the example below, allocation a and allocation b have overlapping
lifetimes in all executions, so it should be impossible to observe them having
the same address. InstCombine removes the overlapping lifetimes. Which
introduces a behavior that wasn't possible before.

Before InstCombine:

define { i1, i1 } @f() {
  %a = alloca ptr
  %b = alloca ptr
  ; Overlapping lifetimes (removed by instcombine)
  call void @llvm.lifetime.start.p0(i64 8, ptr %a)
  call void @llvm.lifetime.start.p0(i64 8, ptr %b)
  call void @llvm.lifetime.end.p0(i64 8, ptr %a)
  call void @llvm.lifetime.end.p0(i64 8, ptr %b)
  ; Disjoint lifetimes
  call void @llvm.lifetime.start.p0(i64 8, ptr %a)
  call void @g(ptr %a)
  call void @llvm.lifetime.end.p0(i64 8, ptr %a)
  call void @llvm.lifetime.start.p0(i64 8, ptr %b)
  call void @g(ptr %b)
  call void @llvm.lifetime.end.p0(i64 8, ptr %b)
  ; Obscured equality comparison. Avoids fold that incorrectly assumes that
  ; "Two distinct allocations will never be equal." See #45725 for details.
  %1 = icmp ule ptr %a, %b
  %2 = icmp uge ptr %a, %b
  %3 = insertvalue { i1, i1 } poison, i1 %1, 0
  %4 = insertvalue { i1, i1 } %3,     i1 %2, 1
  ret { i1, i1 } %4
}

declare void @g(ptr)

After InstCombine

define { i1, i1 } @f() {
  %a = alloca ptr, align 8
  %b = alloca ptr, align 8
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %a)
  call void @g(ptr nonnull %a)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %a)
  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %b)
  call void @g(ptr nonnull %b)
  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %b)
  %1 = icmp ule ptr %a, %b
  %2 = icmp uge ptr %a, %b
  %3 = insertvalue { i1, i1 } poison, i1 %1, 0
  %4 = insertvalue { i1, i1 } %3, i1 %2, 1
  ret { i1, i1 } %4
}

https://alive2.llvm.org/ce/z/Vo8GLq

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