diff --git a/libraries/SPISlave/src/SPISlave.cpp b/libraries/SPISlave/src/SPISlave.cpp
index a88915b518..3d58a86721 100644
--- a/libraries/SPISlave/src/SPISlave.cpp
+++ b/libraries/SPISlave/src/SPISlave.cpp
@@ -63,14 +63,17 @@ void SPISlaveClass::_s_status_tx(void *arg)
 {
     reinterpret_cast<SPISlaveClass*>(arg)->_status_tx();
 }
-
-void SPISlaveClass::begin()
+void SPISlaveClass::begin() //backwards compatibility
+{
+    begin(4);
+}
+void SPISlaveClass::begin(uint8_t statusLength)
 {
     hspi_slave_onData(&_s_data_rx);
     hspi_slave_onDataSent(&_s_data_tx);
     hspi_slave_onStatus(&_s_status_rx);
     hspi_slave_onStatusSent(&_s_status_tx);
-    hspi_slave_begin(4, this);
+    hspi_slave_begin(statusLength, this);
 }
 void SPISlaveClass::end()
 {
diff --git a/libraries/SPISlave/src/SPISlave.h b/libraries/SPISlave/src/SPISlave.h
index a52495cf9c..86b30875f2 100644
--- a/libraries/SPISlave/src/SPISlave.h
+++ b/libraries/SPISlave/src/SPISlave.h
@@ -52,6 +52,7 @@ class SPISlaveClass
     {}
     ~SPISlaveClass() {}
     void begin();
+    void begin(uint8_t statusLength);
     void end();
     void setData(uint8_t * data, size_t len);
     void setData(const char * data)
diff --git a/libraries/SPISlave/src/hspi_slave.c b/libraries/SPISlave/src/hspi_slave.c
index a2cbf9d466..c597e7aa88 100644
--- a/libraries/SPISlave/src/hspi_slave.c
+++ b/libraries/SPISlave/src/hspi_slave.c
@@ -72,11 +72,10 @@ void ICACHE_RAM_ATTR _hspi_slave_isr_handler(void *arg)
 
 void hspi_slave_begin(uint8_t status_len, void * arg)
 {
-    status_len &= 7;
     if(status_len > 4) {
         status_len = 4;    //max 32 bits
     }
-    if(status_len == 0) {
+    else if(status_len == 0) {
         status_len = 1;    //min 8 bits
     }
 
@@ -85,7 +84,13 @@ void hspi_slave_begin(uint8_t status_len, void * arg)
     pinMode(MISO, SPECIAL);
     pinMode(MOSI, SPECIAL);
 
-    SPI1S = SPISE | SPISBE | 0x3E0; // SPI_SLAVE_REG
+    SPI1S = SPISE | SPISBE | SPISTRIE | SPISWBIE | SPISRSIE | SPISWSIE | SPISRBIE;	//(0x63E0)
+    //setting config bits in SPI_SLAVE_REG, defined in "esp8266_peri.h" :
+    //SPISE - spi slave enable
+    //SPISBE - allows work (read/write) with buffer, without this only? status available
+    //SPISTRIE - enables TRANS?? interrupt
+    //other SPISxxIE - enables corresponding interrupts (read(R)/write(W) status(S) and buffer(B))
+  
     SPI1U = SPIUMISOH | SPIUCOMMAND | SPIUSSE; // SPI_USER_REG
     SPI1CLK = 0;
     SPI1U2 = (7 << SPILCOMMAND); // SPI_USER2_REG